In recent years, a new trend has emerged in the networking industry. Devices such as routers and switches have begun to evolve from monolithic, highly customized and integrated designs into aggregations of discrete, modularized components. Intel® Open Networking is an architecture with open interfaces for flexible deployment of new network services and technology. This architecture demonstrates modular design by separating control and management functions through a control element (CE) of a network device from forwarding elements (FEs) that perform data forwarding functions. This type of architecture takes advantage of the best-of-the-breed network forwarding hardware while not requiring changes in the control software. In Open Networking architecture, a network device consists of a set of FEs controlled by single or multiple CE(s). The FEs can be interconnected in some arbitrary topology. While the architecture of Open Networking provides many advantages over monolithic designs, it also introduces new challenges in preserving the behavior of a standard networking device. One such challenge is the routing of packets through the set of forwarding elements in a network element with multiple FE elements. For example, when a single-box router forwards a packet, it executes a lookup in the routing table for the destination Internet protocol (IP) address.
In conventional systems, the router table lookup is based on the longest-prefix match. The longest-prefix match analyzes or evaluates the entire IP address to determine the next hop in the packet forwarding. The longest-prefix matches are time consuming, and unnecessary when the packet is forwarded within a router.
This process (often called route lookup), is time-consuming and limits the performance of the router. Other associated operations in the forwarding process include validating the header checksum, decrementing the time-to-live (TTL), and then recalculating and updating the header checksum. In the network element with multiple FE elements, packets might pass through multiple FEs, and when each FE performs route lookup and performs the other associated operations on the packet, the performance of the network element is reduced because of the resources that are required to support the multiple route lookup. Also, the network element will act like a set of routers as opposed to a single logical router since TTL would be decremented multiple times, once by each FE as the packet passes through it. It is important for such a network element with multiple FE elements to act as a single logical router to preserve the behavior of a standard router. Therefore it is important to minimize the route lookup and associated operations.
One conventional model for high-speed routers consists of a number of FEs interconnected by a high-speed switching fabric. These existing routers with multiple FEs use proprietary switching protocol between the FEs to forward packets between them. This current model has proved to be highly efficient, but proprietary interfaces to their hardware prevent innovation by networking independent software vendors (ISVs) and independent hardware vendors (IHVs).
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for more efficient transferring of packets within a router.